The Development of Oscillators Perform Superiorly
Crystal oscillators with a wide range of 750 kHz to 1.35 GHz can provide significant business and performance advances. And these years, people require oscillators to have much higher frequencies and low jitter, as well as the low cost. Designers are trying to keep the balance between high-level performance and cost-effective purchasing
Oscillator improvement
Thanks to the new technologies, such as configurable oscillator technology, the application of the oscillators also become more widely including telecommunications and data networks as well as consumer products. At the same time, the delivery of oscillators and voltage-controlled crystal oscillators (VCXO) become more timely and affordable than ever before.
The configurable crystal oscillator technology has the advantages that common oscillators can not be compared that is its ability to deliver its technical and business advantages across a frequency range of 750 kHz to 1.35 GHz with low jitter (less than 1 ps) and phase noise characteristics comparable to conventional crystal oscillators and SAW oscillators, as well as jitter and phase noise characteristics better than MEMS oscillators. This customizable technology also enables new crystal oscillators to find homes as diverse as the clock source in 10G Ethernet, optical networks, storage-area networks (SANs), FPGAs, ADSL, and many other applications.
Modular Architecture minimized Noise
The modular building-block architecture of these new configurable oscillators, versus the “one-solution-fits-all” approach of programmable oscillators, provides the desired frequency without compounding the noise in the performance of the finished product.
A configurable oscillator begins with a conventional oscillator crystal blank that runs the output through a series of functions, just like a programmable oscillator. But it uses one of several fractional-N phase-locked loops (PLLs) chosen based on the desired frequency for the final application, instead of a conventional integer PLL that just blankets a wide frequency range. Because the fractional-N PLL does not divide the reference frequency, it helps eliminate one of the noise problems associated with programmable oscillators.
To compensate for spurs, which show up as noise elements in any fractional-N PLL, the configurable oscillator design employs third-order delta-sigma modulator (DSM) technology to lower the overall amplitude of the spurs by spreading them over a larger bandwidth, lowering the total spur level. Combined with ASICs, this modular design allows for accurate performance, lower noise, decreased costs, shorter lead times, and increased flexibility.