China state electron ” three-dimensional chip ” is difficulty of patent technical research and development great?
China state electron ” three-dimensional chip ” patent (CN119108358A) difficulty of technical research and development is greater. Particular system now the following respects:
- Chip pile and silicon perforation technology: This patent technology needs to have many chip layer pile, want to make the silicon perforation structure that crosses these chip at the same time. In chip pile process, need to assure the accurate alignment between each chip layer, any small error affect chip performance possibly, bring about chip to discard as useless even. Silicon punchs the technology asks to have high accuracy bore and metallic stuff in chip interior, extremely tall to craft precision and equipment requirement, if technology control is undeserved, appear easily perforative dimension deviation, fill is not complete wait for a problem, affect the electric function of chip and reliability.
- Temperature sensor is compositive: The temperature sensor that should set structure of proximate silicon perforation on the first chip is mentioned in patent, change with monitoring temperature in real time. This need temperature sensor accurate and compositive to chip specific place, and cannot original to chip structure and function produce bigger effect. In the meantime, should ensure the sensitivity of temperature sensor and accuracy, can fast, essence feels silicon definitely to punch the temperature near the structure changes, this raised very tall requirement to sensor design and workmanship.
- Heat management is optimized: Three-dimensional chip because chip layer pile, quantity of heat builds up more easily, heat management becomes crucial difficult problem. Although this patent aims to increase heat management capacity, but should achieve this one goal, need to consider chip structure, data integratedly choice, medicinal powder the many sided element such as hot method design. For example, want to choose appropriate chip to enclose material, want to have good thermal conductivity already, want to satisfy the other property requirement such as electric insulation again, this need works through a large number of experiments and research and development.
- Heterogeneous bond technology: Three-dimensional chip can use heterogeneous bond technology normally, will different capable person pledges or chip layer bond of the function is together. In heterogeneous bond process, want to solve the problem of difference of hot coefficient of expansion between different material, it is otherwise in chip job process, because temperature changes to bring about concentration of bond interface occurrence stress possibly, affect the reliability of chip then. And, the flatness of bond interface and cleanness are spent crucial to bond quality, the bond technology that needs to use high accuracy and strict technology control will assure.
- As compatible as existing craft: Research and development is three-dimensional when chip technology, still need consideration and the compatibility that have semiconductor workmanship, so that production can have on foundation of existing product line, lower manufacturing cost and technical threshold. But the special technology requirement of three-dimensional chip, the pile that is like high accuracy and bond, with the tradition workmanship of 2 dimension chip has bigger difference, should come true good and compatible be not easy thing, need undertakes be improved in great quantities and be optimizinged to having technology.