74HC595 cites principle of job of crural graph sequential chart

 It is to be in like 74HC595 and 74hc164 odd an one of commonly used chip in engine system his action is serial signal turns for collateral signal, commonly used the drive chip in all sorts of number canals and latticedot matrix screen, use 74HC595 is OK and managing odd the Io mouth resource of a machine Mcu, use 3 Io to be able to control what 8 numbers are in charge of to cite a base, he still has certain drive capacity, can avoid the enlarge circuit such as dynatron, the god that so this chip is drive number canal implement. Application is very wide.

   74HC595 makes crural plan
     74HC595 pin function

I introduce 74HC595 job principle below:
The data of 74HC595 carries:
QA- – QH: 8 collateral output are carried, 8 when number of OK and direct control is in charge of paragraph.
QH’ : Cascade outputs end. I receive it the next the SI end of 595.
SI: Serial data inputs end.
The control of 74hc595 carries a specification:
/ SCLR(10 foot) : The shift register data to clear when low n. Normally I receive it Vcc.
SCK(11 foot) : Ascendant edge duration occupies the data shift of register. QA- – > QB- – > QC- – > . . . – – > QH; Drop data of edge shift register is constant. (pulse width: When 5V, was more than second of a few accept to go. I choose small second course normally)

 Control shift register
      Data of SCK ascendant edge Shift       SCK drops edge data Maintain 
RCK(12 foot) : The data of register of the shift when ascendant edge enters memory register, drop data of register of the memory when the edge is constant. Normally buy of my general RCK is low n, after shift ends, in RCK end produces pulse (when 5V, was more than second of a few accept to go. I choose small second course normally) , update indication data.

 Control memory register
     RCK rises to enter memory register along the data of shift register      RCK Drop data of edge memory register is constant  
/ G(13 foot) : Prohibit outputting when tall n (tall block condition) . If odd of a machine cite a base not nervous, bring a foot to control it with, generation twinkles and can extinguish the effect conveniently. Control the save labour when wanting a province than carrying shift through data.
Note: 74164 with 74595 functions similar, it is 8 serial inputs turn register of collateral output shift. The drive electric current of 74164 (25mA) compares 74595(35mA) want small, 14 feet are enclosed, volume is a few minorrer also.
The main good point of 74595 is to have data storage register, in the process of shift, the data that outputs end can keep changeless. This has use very much in the circumstance with serial slow rate, digital canal did not twinkle feeling.

Only with 74hc164 data to clear carries photograph comparing, when 74hc595 still has output to carry more can / prohibit controlling upright Oe, can make output is tall block condition. It is to use this chip so the meeting is more convenient

74HC595 is to have 8 shift register and a memory, 3 condition output a function. Shift register and memory are the clock that part. Data is in SHcp (see sequential chart) ascendant edge input, in STcp (see sequential chart) go in the memory register that ascendant edge enters. If two clock are connected together, criterion shift register always is earlier than memory register a pulse. Shift register has a serial shift to input (Ds) , with a serial output (Q7 ‘ ) , with the low n restoration of an asynchronous, memory register has to run paralell 8, have ternary bus line output, should make can when OE (for low n) , the data of memory register outputs bus line.
The distinction of 74HC595 and 74HC164 basically has:
1, 74HC595 has Suo Cunqi, in shift process so output can maintain changeless; and 74HC164 does not have Suo Cunqi, so every produce output of clock of a shift to be changed. This is the biggest distinction of both
2, 74HC595 uses special Q7′ to cite a base implementation is multichip cascade;74HC164 uses output to bring crural Q7 cascade directly
3, 74HC595 has make can OE, the output when OE is invalid cites a base for; of tall block condition 74HC164 did not make can cite a base
4, the restoration of 74HC595 is aimed at shift register, want restoration LATCH register to still need ST_CP ascendant edge to put to load of shift register content register; to the lock that is to say: The restoration of 74HC595 is synchronous, the restoration of 74HC164 is asynchronous, the restoration of 74HC164 is so simpler